Both drives have four small screws on the exterior shell that need to be removed. One of which is under a void sticker. Inside, there are four more screws needing removal and the controller rests on a thermal pad.
The 256GB drive above, shows the same NAND layout as the 512GB drive below on this side of the PCB.
The 256GB drive carries NAND with part number MT29F128G08CBCCBH6 based on the FBGA code NW645 and is 128Gbit (16GB) in density.
The 512GB drive carries NAND with part number MT29F256G08CECCBH6 based on the FBGA code NW656 and is 256Gbit (32GB) in density.
Flipping the board over on the 256GB drive, we see more of the NAND along with the controller and cache chip.
The 512GB drive has the same configuration.
The cache chip on each carry FBGA code D9RLT which is a LPDDR2 SDRAM part that has a capacity of 4Gb (512MB) and the same one we saw on the M550 drive. Next door you can see the array of capacitors that protect against data loss should the power be interrupted.
Both drives carry the very same Marvell 88SS9189 controller that we also saw on the M550 drive. The biggest update on this chip is the implementation of DevSLP support which allows for ultra low power draw in sleep mode. The controller is made efficient and reliable by the RAIN (Redundant Array of Independent NAND) technology it employs to create a RAID-like configuration for speed and the use of checksums for integrity checks.