Intel hosted an Architecture Day this week in California for analysts and media that allowed Intel’s top executives, architects and fellows to reveal their next-generation technologies to a captive audience. Most of the Intel architecture coverage in 2018 revolved around where are the 10nm products were at and why they were delayed. Legit Reviews was happy to be one of the many outlets invited to the event as we really wanted to see what message Intel wanted to deliver.
One of the key speakers of architecture was Raja Koduri, Intel’s senior vice president of Core and Visual Computing, and he outlined a strategic shift for the company’s design and engineering model. Raja explained that there will be immense demand for compute architectures that scale up exponentially and he believes that we will see CPU architectures evolve at a faster pace than we have ever seen before. Many have wondered if Intel has lost it’s CPU architecture and transistor leadership thanks to the 10nm delays, but Mr. Koduri doesn’t think that is the case.
Intel currently sees the Total Addressable Market (TAM) for computing as being $45 billion right now and that it will go to over $300 billion by 2022. After joining Intel Mr. Koduri gathered Jim Keller, Senior VP GM Silicon Engineering Group, and other key engineers in early 2018 to map all the key technologies that they needed to excel at. After this discussion, the group came up with six pillars that would help Intel drive an accelerated pace of innovation.
The six strategic pillars are: process, architecture, memory, interconnect, security, and software. Intel gave the following explanations for each area.
One of the major announcements at the briefing was that Intel has created a new 3D packaging technology, called ‘Foveros’ and plans to bring it to market in 2019. Foveros is expected to extend die stacking beyond traditional passive interposers and stacked memory to high-performance logic, such as CPU, graphics and AI processors for the first time.
The Foveros 3D Integration allows Intel chip engineers to ‘mix and match’ technology IP blocks with various memory and I/O elements. Intel just announced Embedded Multi-die Interconnect Bridge (EMIB) 2D packaging technology in 2018 and this is further advanced that and will help fuel new chips and ultimately new device form factors.
3D packaging technology has been talked about for years, but it has been tough to get the proper power to the chips furthest away from the package and heat rises. Intel says that they have solved both of these issues and that the power delivery circuits fabricated in the base die have no issues feeding the smaller chips stacked on top.
Intel expects to launch actual products using Foveros packaging technology in the second half of 2019. The first Foveros product will combine a high-performance 10nm compute-stacked chiplet with a low-power 22FFL base die in a chip that is just 12 mm x 12 mm in size. It will enable the combination of world-class performance and power efficiency in a small form factor.
Intel showed a demo of a functional processor with Intel’s Foveros 3D packaging technology running a demo during the briefing. The demo was showing a developmental quad-core processor running a 4K video clip with ‘CPU 4’ being ‘parked’ as only high efficiency cores were being used and the high performance core was not needed.
When the Windows home key on the system was pressed or the video resized, the ‘parked’ core would become ‘unparked’ and used for the task. No video was allowed of the demo and Intel wasn’t showing how much load was on the other two cores. The key point here is that Intel has chips built using Foveros technology up and running today and that they will be coming out in the second half of 2019.
The other exciting are that was covered Intel’s next-generation CPU microarchitecture called Sunny Cove. Sunny Cove is the successor to Skylake and Intel has gone deeper, wider, and smarter than ever before with this new design. Sunny Cove will also be the foundation for Intel’s next-generation server (Intel Xeon) and client (Intel Core) processors that will be coming out in 2019.
It has been a number of years since Intel increased their L1 cache size, but with Sunny Cove they are increasing it by 50%. Intel also increased the L2 cache, a larger uop cache, and a larger 2nd level TLB (translation lookup buffer).This should enhance what the front end of processor is capable of handling as they have significantly increased the size of key structures like the reorder buffer, load buffer, store buffer, and reservation stations.
The wider part of the Sunny Cove equation had to deal with the larger scheduler design. Intel has gone from 8 to 10 execution ports, doubled the L1 store bandwidth and added new capabilities per port such as SIMD shuffle and LEA.
Intel also has come up with new algorithms that help them scale better and branch prediction accuracy improvements have been made. Latency also got some attention and has been reduced with improved integer dividers.
All of these new features will help accelerate special purpose computing tasks like AI and cryptography, which Intel sees as being super important for future computing. Sunny Cove should bring us reduced latency, high throughput with greater parallelism than ever before that should improve the computing experience across the board. Intel did not discuss gaming performance improvements with Sunny Cove, but did say that the gaming experience will be improved.
Intel also showed us their CPU core roadmap that stretches out 5-years to 2023. It shows that for Intel Core CPUs that we have Sunny Cove coming out in 2019 and that will be followed up with Willow Cove in 2020 (cache redesign, new transistor optimization and security features) and then then in 2021 we will see Golden Cove introduced (ST perf, AI perf, 5G perf, security feature).
Intel Atom has Tremont coming in 2019, Gracemont in 2021 and then the ‘Next’ Mont will be sometime in late 2022 from the looks of the roadmap.
Intel had a demo of Sunny Cove that showed off it’s new performance-boosting instructions for cryptography, such as vector AES and SHA-NI. The demo had an Intel Kaby Lake platform on one side with Intel Sunny Cove on the other and both test platforms were running 8-threads on 7-zip at the same clock frequency. Kaby Lake finished the test in 16.65 seconds and Sunny Cove finished it in 9.76 seconds. Intel claims that they are seeing up to 75% more performance on Sunny Cove in 7-Zip with the new ISA capabilities. The demo that was run live in front of us was showing over 60% performance gains.
The demo was using AES-256 encryption and all 8 CPU threads on each processor were being used.
Intel would not let us film anything at the event and most of the demos were running on development boards as these are all really early demonstrations.
Intel also unveiled new Gen11 integrated graphics at the event. This new GPU is pretty insane as Intel gave it 64 enhanced execution units, more than double previous Intel graphics solution (Gen9 had 24 EUs). Intel set off to design a GPU that could break the 1 TFLOPS barrier and it looks like 64 EUs was the magic number. Intel will start integrated this graphics solution into 10nm processors in 2019.
Intel Gen11 graphics will also feature Intel Adaptive Sync technology enabling smooth frame rates for gaming. This is similar to the tear- and jitter-free gaming experiences that gamers have come to love from AMD (FreeSync) and NVIDIA (G-Sync).
They also had a demo showing Intel’s latest HEVC Quick Sync video engine in Gen11 having a 30% bitrate reduction over Gen9, while having the same or better visual quality. The improvements to dedicated hardware acceleration should help those that game stream and do video editing.
At the event, Intel showed Tekken 7 powered by the Unreal Engine 4 running great on Gen11 graphics. Frame rates weren’t being shown, but it looked like Intel was nearly doubling the performance of the system running Intel’s Gen9 graphics.
Intel also had a slide at the event that showed what they are working on after Gen11 graphics. Intel is working on the Xe GPU architecture and they plan on going from Teraflops to Petaflops of performance with this architecture. We just were teased with 1 Teraflop on Gen11 that is coming out in 2019 and now we are being shown something in the Petaflops in performance could be possible soon. The Intel Xe GPUs will be used for both client and data center applications.
Intel had some really great things to talk about at architecture day and it looks like 2019 is going to be a good year for Intel!