AMD Introduces the SSE5 Instruction Set
AMD today announced further plans to innovate the x86 architecture by introducing SSE5, a new extension of the x86 instruction set that is designed to allow software developers to simplify code and achieve greater efficiency for the most performance-hungry applications. SSE5 will give developers additional capabilities to help maximize the performance of applications that have daily impact on consumers and enterprises, including high performance computing, multimedia and security applications. By making the SSE5 specification available to developers today, AMD expects to ease the adoption of the new instructions for tool providers and software vendors who develop these performance-intense applications.
“Chip advancements and software improvements go hand-in-hand, to the benefit of consumers and enterprises alike,” said Phil Hester, senior vice president and chief technology officer, AMD. “The impact of our designs are best realized when AMD-based servers, PCs and devices enable software to more effectively solve every-day problems and enhance every-day experiences. By announcing our plans to add SSE5 instructions to the x86 instruction set — and by making the specification available today — we are enabling open and collaborative software innovation that will bring AMD’s advancements to life for our customers and end-users.”
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