AMD Phenom TLB Patch Benchmarked and ExplainedFri, Dec 21, 2007 - 12:00 AM
AMD Phenom Errarta 298 – Important or Hype?
When AMD was briefing the media about Phenom at their launch event they mentioned that a fix was in the works for one of the hundreds of erratums that the Phenom processor has. All processors have glitches and they are documented and given a erratum number. As time goes on many of these get fixed with BIOS updates and whole new CPU steppings. This is normal and the way AMD and Intel have developed and updated processors for decades. The erratum that was in the fix dealt with the Translation lookaside buffers (TLB) on the new L3 cache fond only on Phenom processors. Translation lookaside buffers help the processor map virtual addresses to physical addresses. They hold the most recently used page mapping information in fast, chip-resident memory to speed up address translation. When a TLB miss occurs, page mapping information can be lost if it is not found in the L1 or L2 caches. For some reason AMD didn’t fully expose how minor/major the erratum was, so when Scott over at the Tech Report wrote about huge performance loses when the TLB erratum was fixed many in the industry freaked out. At the time of his article the BIOS fix for the TLB erratum was automatically enabled in the BIOS and was not able to be turned off. A couple weeks ago we got our hands on OverDrive 2.0.12 and found by using the Turbo button the TLB patch can be disabled. AMD just this week released OverDrive 2.0.13 beta, which adds more features but still lacks 64-Bit driver signing. That means if you are running 64-bit Vista for example you have to disable driver signing by hitting F8 while windows is booting, change the setting and then let Windows Vista 64-bit fully load.
Over the past couple weeks AMD has made some strides when it comes to the TLB erratum, which to be honest should not be as big of a deal as many make it out to be. Legit Reviews has a number of staff members with Phenom systems and not one has encountered erratum number 298. After over a month of performance testing and use not one blue screen of death or crash has been seen that wasn’t related to overclocking. Legit Reviews contacted AMD about the TLB bug and asked them if they would like to clear the air. AMD was happy to jump at the chance to clear the air up and sent this comment over to us.
“It’s unfortunate that the TLB erratum that affects the AMD Phenom 9500 and 9600 processors has garnered as much attention as it has. Unfortunate not just for AMD, but for customers because I believe it has been blown out of proportion. Every processor, ours and our competition’s, has errata. Phenom is no different. Erratum number 298 is L3 protocol issue which can cause a system hang when running certain client workloads. That may sound scary, but some perspective is needed. It is extremely unlikely desktop users are going to find themselves in a scenario that could trigger this erratum. I won’t go so far as to say no one will ever see it, because I’m not going to claim absolutes like that, and AMD wants to always land on the side of caution and prudence. That’s why I’d point out that the fix is in. We’ve communicated a BIOS modification to motherboard vendors that will ensure system stability, and we’re implementing a silicon fix in future CPUs. But what really stands out to me is that we put a switch in the AMD OverDrive utility that enables PC users to disable the BIOS workaround. That should send a message of our confidence that desktop users should not lose sleep about this particular erratum.” – AMD PR to Legit Reviews on 12/19/2007
AMD says the TLB erratum is nothing to lose sleep about as end users have the ability to disable the BIOS workaround. Let’s take a look at our test system with and without the BIOS workaround enabled and see what happen to performance on a couple popular benchmarks.